Lack of access to I/O pins can challenge the test coverage achievable using probes alone. Eutron chose XJTAG boundary scan to raise coverage to the level required. The intuitive user interface lets engineers test parts of their boards that can not be reached any other way, effectively testing the untestable.
Eutron is an electronic manufacturing services and solutions (EMS2) company headquartered outside Bergamo, northern Italy. With extensive competencies for building the “intelligent world”, the organisation’s technical skills include hardware and software design, and state-of-the-art manufacturing. All assemblies must be built and tested to high standards, for deployment in challenging environments such as smart factories, smart cities, and smart infrastructure.
Hardware designers everywhere know that pushing the limits of functionality can often compromise testability. Component packages such as BGAs, flip-chip CSPs, and LGAs have I/O pins that are difficult or impossible to access with test probes, while space for test points is always needed either for other components or to be removed to save space. Components that contain internal boundary scan circuitry, however, can be tested without direct probing. The XJTAG boundary scan test system can also control the I/O pins of non-JTAG devices that are on the same nets as devices connected to the scan chain. In this way, XJTAG can test connections that are untestable using other techniques.
Eutron has invested in the XJTAG system for this very reason, as Test Engineer Luca Gherardi explains, “We are using XJTAG to test processing modules that contain a combination of DDR and flash memory chips, FPGAs, logic devices, various encoders, and off-board interfaces such as RS-232 and CAN transceivers,” he says. “There are often connections that cannot be probed. XJTAG can reach them and helps us test a high proportion of each board quickly and efficiently.”
Engineers can write tests easily in XJTAG’s system using high-level instructions, without spending time learning the finer points of boundary scan such as how to construct low-level test vectors. And with features such as the automatically generated Connection Test and device-centric library scripts, XJTAG handles any board design changes during development efficiently, and enables custom tests to be reused in future projects.
The XJTAG user interface is clear and intuitive, which helps maximise the benefits of boundary scan testing. “The user interface makes an instant impression and is one of the most powerful aspects of XJTAG,” agrees Luca Gherardi.
“We can debug to see exactly what the tests are doing, and the tests themselves rapidly diagnose opens, shorts and stuck faults. The Layout and Schematic Viewers help quickly troubleshoot any failed boards.”
In addition to testing inaccessible connections, XJTAG can test a high percentage of connections extremely quickly thereby enabling simpler in-circuit test routines and lower-cost fixtures. In addition, XJTAG provides test coverage analysis for each board, and XJTAG DFT Assistant software extensions/plugins are available for popular EDA tools including Altium Designer, OrCAD Capture, Mentor Xpedition and PADS, and Zuken CR-8000 to help users analyse and increase test coverage before the first prototype is produced.
Luca Gherardi summarises, ”The XJTAG system’s configurability, clarity and ease of use help us deliver the extremely high quality and reliability our customers need.”
