Testing with no netlist

To test a board using JTAG it is usually necessary to have design information including a netlist. Repair engineers rarely have access to this data, but XJTAG contains functionality specifically designed to overcome this problem.

If you don’t have the netlist for a board you need to test, XJDeveloper allows you to base your test system on the BSDL files for the JTAG devices on the board rather than forcing you to use a netlist. It can also generate minimal BSDL files even if you don’t have the vendor’s BSDL files for some devices. The system can then connect to a working board to automatically discover connections between the JTAG devices for use during connection test. You can also add additional non-JTAG device such as RAM, flash or devices on peripheral busses such as I²C and SPI, in order to extend the test coverage.

This feature is particularly useful to repair engineers, who are often required to work on boards without having access to a netlist. Where previously they would not be able to use boundary scan, or be delayed by having to seek out these netlists from their customers before beginning any work, testing can now begin without delay. XJTAG boundary scan is now an even more valuable option for the repair industry.

The ‘no-netlist’ feature also allows engineers to add non-JTAG devices to these projects, simply by specifying how they are connected to the JTAG devices on the board. They can then be tested using XJEase Library files, which improves test coverage and saves the time and effort otherwise required to physically test these devices using probes.

For support, or for a quote on any part of the XJTAG system, please contact us.