Testing with Boundary can help boost test coverage, accelerate design verification and debugging, and increase production-test efficiency for Mentor, a Siemens Business. Mentor PADS® users can now leverage XJTAG’s experience to maximise the power of boundary scan in their designs without leaving their favourite environment, using the new, free XJTAG DFT Assistant for PADS.
Mentor PADS personal automated design solutions streamline product creation and help designers optimise all aspects of performance and manage their projects from design entry, through simulation and analysis, to sign-off for production. Optional extensions allow users to add capabilities such as advanced board layout, power-delivery analysis, thermal analysis, and support for RF design, high-speed design, and high-density or timing-critical routing.
PADS is now even more powerful with XJTAG’s boundary scan test know-how built-in. “Boundary scan can add value from the beginning of the product lifecycle, and is becoming increasingly important to our customers,” explains Jim Martens, Product Marketing Manager, PADS Solutions Group. “We saw the opportunity to enhance PADS with class-leading design for boundary scan test capability, by integrating the features of XJTAG’s highly regarded DFT Assistant.”
Boundary scan can check a high proportion of a board’s connections early in the design phase, before any hardware is produced, and only requires the Test Access Port (TAP) pins of JTAG-compliant components to be correctly linked and routed to a connector. The simple four-signal interface allows easy software-based access to I/O pins that are otherwise hard to reach with probes, such as BGA I/O connections. The TAP, and traces comprising the scan chain that links the JTAG pins, occupy minimal real estate on the board.
When designing and prototyping boards, boundary scan tools help check for design errors before any hardware is built. First prototypes can be tested quickly to pinpoint connection errors, potentially saving hours buzzing out boards looking for shorts or opens that may cause errors or prevent the board starting up. In production, boundary scan can quickly check a high percentage of connections to help isolate defective boards and boost overall test efficiency.
Engineers can maximise the test coverage achievable with boundary scan by connecting JTAG compatible components into a JTAG chain. Using the JTAG chain, testing can be further extended to non JTAG compatible devices. PADS users can take advantage of XJTAG’s Design-for-Test (DFT) know-how, acquired through years working with clients and refining the XJTAG test development suite, by using the XJTAG DFT Assistant for PADS now included in their favourite design environment.
XJTAG DFT Assistant for PADS features an Access Viewer that gives a graphical view of JTAG chain access across the board, which help users visualise the extent of test coverage and see how their design changes affect testability as the project progresses. In addition, the Chain Checker verifies that all the JTAG and TAP pins are correctly connected and terminated before committing to hardware. The information can be exported directly to the XJTAG test-development environment, where the testing to be carried out can be configured.
“Our customers can now use PADS to produce even better board designs that benefit from higher test coverage, faster debugging and prototyping, and more efficient testing in production. Working with XJTAG enabled us to achieve a high-quality result within a fast turnaround time,” concludes Jim Martens.
