XJAccelerator

Overview
Benefits
Features

XJAccelerator is a multipurpose unit that can be integrated with your XJTAG system to facilitate and accelerate programming functions as well as to extend test coverage on a Unit Under Test (UUT).

Key Benefits

Allows XJFlash accelerated flash programming

Increases UUT test coverage

with additional interface connectivity

Easy integration

with XJTAG test systems

Features

Reconfigurable
FPGA-based board
Supports SPI, IIC, ICSP, SWD and other protocols
Supports NOR and NAND flash devices
Easy voltage selection
Additional power connector for easier mounting in a test fixture
Power connectors for use with the XJAccelerator Active Protectors

JTAG controlled programmer

Based on a Xilinx^® Spartan^®-6 FPGA, the XJAccelerator card is principally designed to provide a versatile platform for accelerated programming applications. In this mode the FPGA is configured with XJFlash to program flash devices connected to any of the three I/O headers. The data to be programmed is typically streamed into the unit over JTAG.

The FPGA can either be configured through its JTAG port, as part of a standard XJTAG project, or from the on-board PROM. To minimise the total time required for each board, the configuration status of the FPGA is checked each time the project is run. The FPGA or the configuration PROM will only be programmed if an unexpected status is found.

Versatile, reconfigurable solution

The XJAccelerator card can be used to program standard NOR and NAND flash devices provided it is given access to all of the required signals. More bespoke programming operations are also possible providing the programming protocol can be replicated by the FPGA.

XJTAG can provide XJAccelerator images that implement the following protocols:

SPI – Serial Peripheral Interface
I²C (IIC) – Philips / NXP Semiconductor’s Inter-IC bus
ICSP – Microchip’s In-Circuit Serial Programming
SWD – ARM’s Serial Wire Debug

If the protocol you require is not listed here please contact us and we will be happy to investigate the possibility of adding that capability.

The unit is powered by an external 5 V supply. The voltage levels for the three I/O connectors are user configurable from 1.2 V to 3.3 V, selectable by rotary switch.

Digital I/O testing

It is possible to use the boundary scan capabilities of any unused signals on the three I/O headers for external digital I/O testing on a UUT.

Flexible connection

An XJAccelerator card can be connected to any of XJTAG’s JTAG controllers in a number of different configurations, allowing easy integration into a wide range of projects. It can either be connected to its own TAP on the JTAG controller or be added in series with the JTAG chain of the UUT.

Protection Boards

Optional XJAccelerator Active Protectors can be placed in-line between the XJAccelerator and the system under test to provide additional sacrificial protection to the XJAccelerator board.